1. Field of the Invention
The present invention relates to a wiring board and a method of manufacturing the same. The invention particularly relates to, for example, a wiring board suitable for mounting a semiconductor element by flip chip connection and a method of manufacturing such wiring board.
2. Description of Related Art
A semiconductor element of so-called “area array” type has been known as a type of semiconductor element used as a semiconductor integrated circuit element and the like. Such area-array-type semiconductor element has, substantially on the entire lower surface thereof, a number of electrode terminals arranged in a grid-like array.
As a method of mounting an area-array-type semiconductor element on a wiring board, flip chip connection is applied. A wiring board used for flip chip connection has, on the upper surface thereof, a number of semiconductor element connection pads. The semiconductor element connection pads are terminals to be connected with electrode terminals of a semiconductor element, and are arranged in an array corresponding to an array of the electrode terminals of the semiconductor element. In flip chip connection, each semiconductor element connection pad placed on the upper surface of the wiring board and each corresponding electrode terminal placed on the lower surface of the semiconductor element are faced to each other so as to be connected electrically and mechanically with each other by soldering. Further, a gap between the semiconductor element mounted on the wiring board and the wiring board is filled with a sealing resin called an underfill, in order to seal the semiconductor element.
Recently, there has been applied a method in which a columnar conductor pillar is formed on the upper surface of a semiconductor element connection pad on a wiring board, and the conductor pillar and an electrode terminal of a semiconductor element are connected with each other (JP 2012-54295 A). Here, a conventional wiring board provided with such conductor pillar is described based on FIG. 5. As shown in FIG. 5, in a conventional wiring board 100, an insulating board 101 has, on the upper surface thereof, a mounting portion 101A on which a semiconductor element S is mounted. On the mounting portion 101A, there are disposed a plurality of semiconductor element connection pads 110, and conductor pillars 112 having individually a protrusion 112a. 
The insulating board 101 has a laminated structure in which an insulating plate 102 to form a core layer is overlaid, on each of the upper and lower surfaces thereof, with a plurality of insulating resin layers 103 to form buildup layers. A plurality of through-holes 107 is formed between the upper and lower surfaces of the insulating plate 102. On the upper and lower surfaces of the insulating plate 102 and on inside walls of the through-holes 107, there is adhesively formed a wiring conductor 104 for the core layer. In each of the insulating resin layers 103, a plurality of via holes 109 is formed. On a surface of each of the insulating resin layers 103 and inside of the via holes 109, there are adhesively formed a wiring conductor 105 for the buildup layers. A part of the wiring conductor 105 forms the semiconductor element connection pads 110 on the upper surface of the insulating board 101. Another part of the wiring conductor 105 forms external connection pads 111 on the lower surface of the insulating board 101. On each of the semiconductor element connection pads 110, the conductor pillar 112 is formed. The conductor pillar 112 has, on the upper end of the columnar base portion thereof, the protrusion 112a with a small diameter. Moreover, on each of the upper and lower surfaces of the insulating board 101, a solder resist layer 106 is adhesively formed. The solder resist layer 106 on the upper surface side is adhered in such a manner that the semiconductor element connection pads 110 and the base portions of the conductor pillars 112 are embedded while the protrusions 112a protrude by 5 to 20 μm. The solder resist layer 106 on the lower surface side is adhered so as to have openings 106a to expose the external connection pads 111.
Further, as shown in FIG. 6A, electrode terminals T of the semiconductor element S and top end surfaces of the conductor pillars 112 are faced and connected with each other. Then, as shown in FIG. 6B, a gap between the semiconductor element S and the solder resist layer 106 on the upper surface side is filled with an underfill F, so that the semiconductor element S is mounted on the wiring board 100.
A description is provided below, based on FIGS. 7A to 7F, in regard to a method of forming the conductor pillar 112 in the above conventional wiring board 100.
First, as shown in FIG. 7A, the solder resist layer 106 is adhered on the upper surface of the uppermost insulating resin layer 103 on which the semiconductor element connection pad 110 is formed. The solder resist layer 106 covers an outer peripheral part of the semiconductor element connection pad 110, while having an opening 106a to expose a central part of the upper surface of the semiconductor element connection pad 110.
Next, as shown in FIG. 7B, a base metal layer 121 is adhered on the surface of the solder resist layer 106 and on an exposed upper surface of the semiconductor element connection pad 110. The exposed upper surface is in the opening 106a. 
Next, as shown in FIG. 7C, a plating mask 122 is formed on the base metal layer 121. The plating mask 122 has an opening 122a above the opening 106a of the solder resist layer 106. The diameter of the opening 122a is smaller than that of the opening 106a. 
Subsequently, as shown in FIG. 7D, the inside of the opening 106a of the solder resist layer 106, on which the base metal layer 121 is adhered, is filled with a plating metal to form a plating-metal layer 123. The plating-metal layer 123 is also adhered in the opening 122a of the plating mask 122, such that the plating-metal layer 123 protrudes by 5 to 20 μm from the upper surface of the solder resist layer 106.
Then, as shown in FIG. 7E, the plating mask 122 is stripped and removed. Finally, as shown in FIG. 7F, the base metal layer 121 on the solder resist layer 106 is removed by etching.
By the above method, there is formed the conductor pillar 112 which has the base portion covered with the solder resist layer 106 and has the protrusion 112a with a small diameter. The protrusion 112a is in a central part of the upper surface of the base portion, protruding upward by 5 to 20 μm from the upper surface of the solder resist layer 106.
In the above wiring board 100, the protrusion 112a with a small diameter, protruding from the solder resist layer 106, has a height of 5 to 20 μm. When the electrode terminal T of the semiconductor element S is placed on top of the protrusion 112a to be connected therewith, it is difficult to form a gap of, for example, 35 μm or more, between the semiconductor element S and the solder resist layer 106 of the upper surface side. Accordingly, it is difficult to fill the gap between the semiconductor element S and the solder resist layer 106 with the underfill F. Moreover, when the underfill F is decreased in viscosity at the time of filling or increased in filling pressure in order to improve filling performance thereof, the underfill F is prone to be extruded excessively on the solder resist layer 106 around the semiconductor element S.
In the conventional method of manufacturing the wiring board 100, increasing the height of the protrusion 112a to 35 μm or more for example, requires increasing the thickness of the plating mask 122 accordingly. However, increasing the plating mask 122 in thickness could reduce the circulation of plating solution which flows into the opening 106a through the opening 122a of the plating mask 122, when the plating-metal layer 123 is adhered in the opening 106a of the solder resist layer 106. As a result, the conductor pillar 112 could not be formed successfully.